The present invention relates to a pattern correcting method of a mask for exposure used in a lithography process in manufacturing a semiconductor device, mask pattern correcting device and the mask for exposure and the semiconductor device using them.
Recently, with segmentation of a semiconductor device, problems have been arising that finished dimension is not exactly as designed in some portions. An example is shortening of a line end part. An example of the shortening is shown in FIG. 1.
Causes of the shortening can be as follows:
(1) Masks are not manufactured according to design dimension;
(2) Corner portions of a line end is already the light resolution limit; and
(3) Mask conversion difference caused by etching.
Taking a wiring pattern of a borderless contact as an example, when a line end where contact portions overlap each other is shortened, an area of contact between the line and a contact hole is reduced, which causes rise in via resistance. This is one of the causes deteriorating device performance.
In order to avoid adverse effect by such shortening, methods such as designing with some additional fringe amount in advance for the contact portion or uniformly providing a fringe amount estimated by experiments using a correcting tool have been commonly used.
However, finishing error in shortening amount or the like can be varied depending on pattern density or line width.
In this way, in the conventional mask pattern correcting method, pattern dependency of the finishing error is not considered and sufficient correcting accuracy can not be obtained.